<?xml version='1.0' encoding='UTF-8'?><?xml-stylesheet href='static/style.xsl' type='text/xsl'?><OAI-PMH xmlns="http://www.openarchives.org/OAI/2.0/" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.openarchives.org/OAI/2.0/ http://www.openarchives.org/OAI/2.0/OAI-PMH.xsd"><responseDate>2026-04-11T05:21:44Z</responseDate><request verb="GetRecord" identifier="oai:ebiltegia.mondragon.edu:20.500.11984/5914" metadataPrefix="mods">https://ebiltegia.mondragon.edu/oai/request</request><GetRecord><record><header><identifier>oai:ebiltegia.mondragon.edu:20.500.11984/5914</identifier><datestamp>2024-07-12T08:22:47Z</datestamp><setSpec>com_20.500.11984_1143</setSpec><setSpec>col_20.500.11984_1148</setSpec></header><metadata><mods:mods xmlns:mods="http://www.loc.gov/mods/v3" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:doc="http://www.lyncode.com/xoai" xsi:schemaLocation="http://www.loc.gov/mods/v3 http://www.loc.gov/standards/mods/v3/mods-3-1.xsd">
   <mods:name>
      <mods:namePart>Arruti Romero, Asier</mods:namePart>
   </mods:name>
   <mods:name>
      <mods:namePart>Aizpuru, Iosu</mods:namePart>
   </mods:name>
   <mods:extension>
      <mods:dateAvailable encoding="iso8601">2022-12-13T14:59:49Z</mods:dateAvailable>
   </mods:extension>
   <mods:extension>
      <mods:dateAccessioned encoding="iso8601">2022-12-13T14:59:49Z</mods:dateAccessioned>
   </mods:extension>
   <mods:originInfo>
      <mods:dateIssued encoding="iso8601">2022</mods:dateIssued>
   </mods:originInfo>
   <mods:identifier type="isbn">978-9-0758-1539-9</mods:identifier>
   <mods:identifier type="other">https://katalogoa.mondragon.edu/janium-bin/janium_login_opac.pl?find&amp;ficha_no=170433</mods:identifier>
   <mods:identifier type="uri">https://hdl.handle.net/20.500.11984/5914</mods:identifier>
   <mods:abstract>This papers proposes a new methodology for estimating the thermal resistance from the junction-to-top capsule surface. By placing the transistor in a vertical position, without being soldered to any PCB, and sensing the dissipated power and the temperatures of the device, it is possible to characterize the internal thermal resistance.</mods:abstract>
   <mods:language>
      <mods:languageTerm>eng</mods:languageTerm>
   </mods:language>
   <mods:accessCondition type="useAndReproduction">© 2022 IEEE</mods:accessCondition>
   <mods:subject>
      <mods:topic>Semiconductor device modeling</mods:topic>
   </mods:subject>
   <mods:subject>
      <mods:topic>Temperature sensors</mods:topic>
   </mods:subject>
   <mods:subject>
      <mods:topic>Thermal resistance</mods:topic>
   </mods:subject>
   <mods:subject>
      <mods:topic>Surface resistance</mods:topic>
   </mods:subject>
   <mods:subject>
      <mods:topic>surface roughness</mods:topic>
   </mods:subject>
   <mods:subject>
      <mods:topic>Thermal analysis</mods:topic>
   </mods:subject>
   <mods:subject>
      <mods:topic>Rough surfaces</mods:topic>
   </mods:subject>
   <mods:titleInfo>
      <mods:title>Novel Analytical Method for Estimating the Junction-to-Top Thermal Resistance of Power MOSFETs</mods:title>
   </mods:titleInfo>
   <mods:genre>http://purl.org/coar/resource_type/c_c94f</mods:genre>
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