<?xml version='1.0' encoding='UTF-8'?><?xml-stylesheet href='static/style.xsl' type='text/xsl'?><OAI-PMH xmlns="http://www.openarchives.org/OAI/2.0/" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.openarchives.org/OAI/2.0/ http://www.openarchives.org/OAI/2.0/OAI-PMH.xsd"><responseDate>2026-04-11T01:18:57Z</responseDate><request verb="GetRecord" identifier="oai:ebiltegia.mondragon.edu:20.500.11984/5475" metadataPrefix="rdf">https://ebiltegia.mondragon.edu/oai/request</request><GetRecord><record><header><identifier>oai:ebiltegia.mondragon.edu:20.500.11984/5475</identifier><datestamp>2024-03-04T09:51:59Z</datestamp><setSpec>com_20.500.11984_473</setSpec><setSpec>col_20.500.11984_478</setSpec></header><metadata><rdf:RDF xmlns:rdf="http://www.openarchives.org/OAI/2.0/rdf/" xmlns:ow="http://www.ontoweb.org/ontology/1#" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:ds="http://dspace.org/ds/elements/1.1/" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:doc="http://www.lyncode.com/xoai" xsi:schemaLocation="http://www.openarchives.org/OAI/2.0/rdf/ http://www.openarchives.org/OAI/2.0/rdf.xsd">
   <ow:Publication rdf:about="oai:ebiltegia.mondragon.edu:20.500.11984/5475">
      <dc:title>Demystifying Non-Isolated DC–DC Topologies on Partial Power Processing Architectures</dc:title>
      <dc:creator>Anzola, Jon</dc:creator>
      <dc:creator>Aizpuru, Iosu</dc:creator>
      <dc:creator>Arruti Romero, Asier</dc:creator>
      <dc:contributor>Artal Sevil, Jesús Sergio</dc:contributor>
      <dc:contributor>Bernal Ruiz, Carlos</dc:contributor>
      <dc:subject>Partial Power Processing</dc:subject>
      <dc:subject>Partial Power Converters</dc:subject>
      <dc:subject>Series Connected Converters</dc:subject>
      <dc:subject>non-isolated topologies</dc:subject>
      <dc:description>This paper discusses the possibility of achieving partial power processing with non-isolated DC–DC topologies. To this end, partial power converter architectures are seen as an interesting solution for reducing the power processed by the converter. We observed via simulations that single-inductor non-isolated topologies cannot achieve partial power processing since the obtained current and voltage waveforms were the same as those found in a full-power converter. However, when using double inductor non-isolated topologies, reduced current and improved efficiencies were achieved. In order to confirm the results obtained from the simulations, single- and double-inductor topologies were tested experimentally. Finally, it was concluded that a double-inductor non-isolated topology can improve its performance by using partial power processing.</dc:description>
      <dc:date>2022-02-28T14:18:50Z</dc:date>
      <dc:date>2022-02-28T14:18:50Z</dc:date>
      <dc:date>2022</dc:date>
      <dc:type>http://purl.org/coar/resource_type/c_6501</dc:type>
      <dc:identifier>2079-9292</dc:identifier>
      <dc:identifier>https://katalogoa.mondragon.edu/janium-bin/janium_login_opac.pl?find&amp;ficha_no=167213</dc:identifier>
      <dc:identifier>https://hdl.handle.net/20.500.11984/5475</dc:identifier>
      <dc:language>eng</dc:language>
      <dc:rights>Attribution 4.0 International</dc:rights>
      <dc:rights>http://creativecommons.org/licenses/by/4.0/</dc:rights>
      <dc:rights>© 202s by the authors. Licensee MDPI</dc:rights>
      <dc:publisher>MDPI</dc:publisher>
   </ow:Publication>
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